1. Field of the Invention
The invention relates generally to a method and apparatus for data recovery when readback error is detected in a direct access storage device (DASD), and more particularly to a method and apparatus for data recovery in a DASD of the type utilizing a magnetoresistive (MR) transducer head and partial-response (PR) data detection.
2. Description of the Prior Art
Computers often include auxiliary memory storage units having media on which data can be written and from which data can be read for later use. Disk drive units incorporating stacked, commonly rotated rigid magnetic disks are used for storage of data in magnetic form on the disk surfaces. Data is recorded in concentric, radially spaced data information tracks arrayed on the surfaces of the disks. Transducer heads driven in a path toward and away from the drive axis write data to the disks and read data from the disks. Various data recovery procedures (DRP's) are known in the art for use when error is detected in the readback of data from the disks.
The combination of magnetoresistive (MR) head technology and other commonly known phase error mechanisms, with the partial-response (PR) data channel has caused a pattern sensitivity problem concerning the reading of repeating patterns from the disk drive. An MR transducing head exhibits a change in resistance when in the presence of a changing magnetic field. This resistance change is transformed into a voltage signal by passing a constant current through the MR element. The value of DC voltage for a given head is the product of the constant bias current and the total resistance between the head lead terminals. The MR voltage readback signal is sampled by an analog-to-digital converter (ADC). DC offset and distortions in the MR voltage readback signal cause the sampled A/D values to be amplitude shifted from their ideal values. For the PR channel, the ideal ternary amplitude values are either +1, 0 or -1 levels. Small amplitude shifts in the ternary levels are to be expected. However, if the amplitude shifts occur on the ternary levels in a repeating pattern, the amplitude shifted ADC samples will cause reduced margin in the detector, timing loop, and gain loop algorithms.
When an MR head reads back a low frequency pattern, the large amplitude can excite instabilities that are not excited when the head reads a high frequency pattern of lower amplitude. This can result in a net phase shift of the low frequency pattern, while not shifting the high frequency pattern. This phase error in combination with other known timing errors such as electronic channel phase error and incorrect setting of write precompensation values can result in a significant timing shift between repeated patterns of high and low frequencies. Such a stress pattern is called a B6E8 stress pattern in the described system. In this system, a B6 hex code for a customer byte is encoded into the codeword 101101101. Given the proper state of the encoder, this is recorded with a single pulse for each adjacent pair of ones, and these pulses alternate signs. Thus repeated bytes of this pattern results in a readback waveform with a period of six clock cells. The E8 customer byte results in the codeword 011011011. This appears as just a shifted version of the previous word; however, with the change in state of the encoder from having a single unpaired one at the end of the B6 codeword before the E8 codeword, the written pattern is changed. In this case the adjacent ones in the pattern are written with two closely spaced pulses of opposite polarity, resulting in one sample at +1 and one sample at -1. Thus the period of the wave is 3 clock cells as can be seen in FIG. 6. This pattern is twice the frequency of the previous codeword. This pattern is used as the high frequency and the previous pattern as the low frequency. This high frequency pattern also has write precompensation on one of each pair of pulses, whereas the low frequency pattern does not. Thus any error in the value of the write precompensation also induces a phase error, or timing difference between the patterns. The total error can be expressed in nanoseconds. This total timing error drives the timing loop to swing back and forth between the phases of each pattern, and the transient behavior produces some overshoot which adds to the maximum timing error.
Transient behavior that exceeds the capture range of the VCO causes the VCO to loose lock with the readback data signal which also is called a sync slip. Dynamic VCO overshoot after pattern switches can cause sync slip. One worst case pattern having repeating patterns of the low and high frequency, and a length near 18 bytes long causes the worst overshoot.